this document describes part-number-specific changes to recommended operating conditions and revised electrical specifications, as applicable, from those described in the general mpc8240 integrated processor hardware specifications (order no. mpc8240ec). specifications provided in this document supersede those in the mpc8240 integrated processor hardware specifications , revision 1.0 or later, for the part numbers listed in table a only. specifications not addressed herein are unchanged. because this document is frequently updated, refer to http://www.motorola.com/semiconductors or to a local motorola sales office for the latest version. note that headings and table numbers in this document are not consecutively numbered. they correspond to the heading or table affected in the general hardware specification. the part numbers addressed in this document are listed in table a. for more detailed ordering information, see section 1.9, ?ordering information.? 1.2 features this section summarizes changes to the features of the mpc8240 described in the mpc8240 integrated processor hardware specifications . power management table a. part number addressed by this data sheet motorola part number operating conditions significant differences from hardware specification cpu frequency v dd t j (c) xpc8240rvv250x xpc8240rzu250x 250 mhz 2.625 125 mv 0 to 105 modified voltage specifications to achieve 250 mhz note: the x prefix in a motorola part number designates a ?pilot production prototype? as defined by motorola sop 3-13. these are part of a limited production volume of prototypes manufactured, tested, and q.a.-inspected on qualified technology to simulate normal production. these parts have only preliminary reliability and characterization data. before pilot production prototypes may be shipped, written authorization from the customer must be on file in the applicable sales office acknowledging the qualification status and the fact that product changes may still occur while shipping pilot production prototypes. advance information MPC8240RXXPNS rev. 0, 11/2003 mpc8240 part number specification for the xpc8240rxxnnnx series motorola part numbers affected: xpc8240rzu250e xpc8240rvv250e f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
2 mpc8240 part number specification for the xpc8240rxxnnnx series motorola general parameters general parameters ? 2.625-v processor core 1.3 general parameters this section summarizes changes to the general parameters of the mpc8240 described in the mpc8240 integrated processor hardware specifications . core power supply 2.625 v 125 mv dc nominal 1.4.1. dc electrical characteristics table 2 provides the recommended operating conditions for the mpc8240 part numbers described herein. table 2. recommended operating conditions characteristic symbol recommended value unit notes supply voltage v dd 2.625 5% v 4, 6 supply voltage for pci and standard bus standards ov dd 3.3 0.3 v 6 supply voltages for memory bus drivers gv dd 3.3 5% v 8 pll supply voltage?cpu core logic av dd 2.625 5% v 4, 6 pll supply voltage?peripheral logic av dd 2 2.6255 5% v 4, 7 dll supply voltage lav dd 2.625 5% v 4, 7 pci reference lv dd 5.0 5% v 9, 10 3.3 0.3 v 9, 10 input voltage lv dd input-tolerant signals v in 0 to 3.6 or 5.75 v 2, 3 all other inputs 0 to 3.6 v 5 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mpc8240 part number specification for the xpc8240rxxnnnx series 3 general parameters 1.4.1.5 power characteristics table 5 provides power consumption data for the mpc8240. power consumption on the pll supply pins (av dd and av dd 2) and the dll supply pin (lavdd) less than 15 mw. this parameter is guaranteed by design and is not tested. die-junction temperature t j 0 to 105 c notes : 1. these are the recommended and tested operating conditions. proper device operation outside of these conditions is not guaranteed. 2. these signals are designed to withstand lv dd + 0.5 v dc when lv dd is connected to a 3.3- or 5.0-v dc power supply. 3. lv dd input tolerant signals: pci interface, epic control, and osc_in signals. 4. see section 1.9, ?ordering information,? for details on a modified voltage (v dd ) version device. cautions : 5. input voltage (v in ) must not be greater than the supply voltage (v dd /av dd /av dd 2/lav dd ) by more than 2.5 v at all times, including during power-on reset. 6. ov dd must not exceed v dd /av dd /av dd 2/lav dd by more than 1.8 v at any time, including during power-on reset. this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 7. v dd /av dd /av dd 2/lav dd must not exceed ov dd by more than 0.6 v at any time, including during power-on reset. this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 8. gv dd must not exceed v dd /av dd /av dd 2/lav dd by more than 1.8 v at any time, including during power-on reset. this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 9. lv dd must not exceed v dd /av dd /av dd 2/lav dd by more than 5.4 v at any time, including during power-on reset. this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 10.lv dd must not exceed ov dd by more than 3.6 v at any time, including during power-on reset. this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. table 5. preliminary power consumption mode pci bus clock/memory bus clock cpu clock frequency (mhz) unit notes 33/66/233 33/83/250 33/100/200 33/100/250 66/100/200 66/100/250 typical 3.4 3.6 3.2 3.7 3.2 3.8 w 1, 5 maximum?fp 3.8 4.1 3.6 4.2 3.6 4.3 w 1, 2 maximum?int 3.4 3.7 3.3 3.8 3.4 3.8 w 1, 3 doze 2.2 2.4 2.2 2.6 2.2 2.6 w 1, 4, 6 nap 700 800 900 900 900 900 mw 1, 4, 6 sleep 500 500 500 500 800 800 mw 1, 4, 6 i/o power supplies mode minimum maximum unit notes typical?ov dd 200 600 mw 7, 8 table 2. recommended operating conditions (continued) characteristic symbol recommended value unit notes f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
4 mpc8240 part number specification for the xpc8240rxxnnnx series motorola pll configurations pll configurations 1.5 pll configurations the mpc8240 internal plls are configured by the pll_cfg[0:4] signals. for a given pci_sync_in (pci bus) frequency, the pll configuration signals set both the peripheral logic/memory bus pll (vco) frequency of operation for the pci-to-memory frequency multiplying and the mpc603e cpu pll (vco) frequency of operation for memory-to-cpu frequency multiplying. the pll configurations for the mpc8240 is shown in table 18. typical?gv dd 300 900 mw 7, 9 notes: 1. the values include v dd , av dd , av dd 2, and lav dd but do not include i/o supply power; see section 1.7.2, ?power supply sizing,? in the mpc8240 integrated processor hardware specifications for information on ov dd and gv dd supply power. one dimm is used for memory loading. 2. maximum?fp power is measured at v dd = 2.625 v with dynamic power management enabled while running an entirely cache-resident, looping, floating point multiplication instruction. 3. maximum?int power is measured at v dd = 2.625 v with dynamic power management enabled while running entirely cache-resident, looping, integer instructions. 4. power saving mode maximums are measured at v dd = 2.625 v while the device is in doze, nap, or sleep mode. 5. typical power is measured at v dd = av dd = 2.625 v, ov dd = 3.3 v where a nominal fp value, a nominal int value, and a value where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit boundaries to local memory are averaged. 6. power saving mode data measured with only two pci_clks and two sdram_clks enabled. 7. the typical minimum i/o power values were results of the mpc8240 performing cache resident integer operations at the slowest frequency combination of 33:66:166 (pci:mem:cpu) mhz. 8. the typical maximum ov dd value resulted from the mpc8240 operating at the fastest frequency combination of 66:100:250 (pci:mem:cpu) mhz and performing continuous flushes of cache lines with alternating ones and zeros to pci memory. 9. the typical maximum gv dd value resulted from the mpc8240 operating at the fastest frequency combination of 66:100:250 (pci:mem:cpu) mhz and performing continuous flushes of cache lines with alternating ones and zeros on 64-bit boundaries to local memory. table 18. mpc8240 microprocessor pll configurations ref. no. pll_ cfg [0:4] 2 cpu 1 hid1[0:4] 250-mhz part 8, 9 ratios 3, 4 pci clock input (pci_sync_in) range (mhz) peripheral logic/mem bus clock range (mhz) cpu clock range (mhz) pci to mem (mem vco) multiplier mem to cpu (cpu vco) multiplier 0 00000 00110 25?33 75?100 188?250 3 (6) 2.5 (5) 1 00001 11000 25?27 75?83 225?250 3 (6) 3 (6) 2 00010 00101 50?56 5 50?56 100?112 1 (4) 2 (8) 3 00011 00101 bypass bypass 2 (8) 4 00100 00101 25?28 5 50?56 100?113 2 (8) 2 (8) table 5. preliminary power consumption (continued) mode pci bus clock/memory bus clock cpu clock frequency (mhz) unit notes 33/66/233 33/83/250 33/100/200 33/100/250 66/100/200 66/100/250 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mpc8240 part number specification for the xpc8240rxxnnnx series 5 ordering information notes: 1. the processor hid1 values only represent the multiplier of the processor?s pll (memory-to-processor multiplier); thus, multiple mpc8240 pll_cfg[0:4] values may have the same processor hid1 value. this implies that system software cannot read the hid1 register and associate it with a unique pll_cfg[0:4] value. 2. pll_cfg[0:4] settings not listed (00110, 01001, 01011, 01101, 01111, 10001, 10011, 10101, 10111, 11001, and 11011) are reserved. 3. in pll bypass mode, the pci_sync_in input signal clocks the internal processor directly, the peripheral logic pll is disabled, and the bus mode is set for 1:1 (pci:mem) mode operation. this mode is intended for hardware modeling support. the ac timing specifications given in this document do not apply in pll bypass mode. 4. in clock-off mode, no clocking occurs inside the mpc8240 regardless of the pci_sync_in input. 5. limited due to maximum memory vco = 225 mhz. 6. limited due to minimum cpu vco = 200 mhz. 7. limited due to minimum memory vco = 100 mhz. 8. for clarity, range values are shown rounded down to the nearest whole number (decimal place accuracy removed). 9. note that the 250-mhz part is available only in the xpc8240rzu nnnx number series. 1.9 ordering information ordering information for the parts fully covered by this specification document is provided in section 1.9.1, ?part numbers fully addressed by this document.? 5 00101 00110 bypass bypass 2.5 (5) 7 00111 11000 bypass bypass 3 (6) 8 01000 11000 33 6 ?56 5 33?56 100?168 1 (4) 3 (6) a 01010 00111 25?27 50?55 225?250 2 (4) 4.5 (9) c 01100 00110 25?50 50?100 125?250 2 (4) 2.5 (5) e 01110 11000 25?41 50?83 150?250 2 (4) 3 (6) 10 10000 00100 25?33 75?100 150?200 3 (6) 2 (4) 12 10010 00100 33?66 50?100 100?200 1.5 (3) 2 (4) 14 10100 11110 25?35 50?71 175?250 2 (4) 3.5 (7) 16 10110 11010 25?31 50?62 200?250 2 (4) 4 (8) 18 11000 11000 25?33 62?83 186?250 2.5 (5) 3 (6) 1a 11010 11010 50 7 ?62 50?62 200?250 1 (2) 4 (8) 1c 11100 11000 33 7 ?55 50?83 150?250 1.5 (3) 3 (6) 1d 11101 00110 33 7 ?66 50?100 125?250 1.5 (3) 2.5 (5) 1e 11110 01111 not usable off off 1f 11111 11111 off off table 18. mpc8240 microprocessor pll configurations (continued) ref. no. pll_ cfg [0:4] 2 cpu 1 hid1[0:4] 250-mhz part 8, 9 ratios 3, 4 pci clock input (pci_sync_in) range (mhz) peripheral logic/mem bus clock range (mhz) cpu clock range (mhz) pci to mem (mem vco) multiplier mem to cpu (cpu vco) multiplier f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
6 mpc8240 part number specification for the xpc8240rxxnnnx series motorola document revision history document revision history 1.9.1 part numbers fully addressed by this document table 19 provides the motorola part numbering nomenclature for the mpc8240. note that the individual part numbers correspond to the maximum processor core frequency. for available frequencies, contact a local motorola sales office. each part number also contains a revision code that refers to the die mask revision number. the revision level can be determined by reading the revision id register at address offset 0x08. 1.9.2 part marking parts are marked as in the example shown in figure 28. figure 28. motorola part marking for tbga device document revision history table b provides a revision history for this part number specification. table 19. motorola part numbering nomenclature xpc nnnn x xx nnn x product code part identifier process descriptor package processor frequency revision level xpc 8240 r=2.625 v 125 mv 0 to 105 c zu = tbga v v = lead free tbga 250 e: 1.3; revision id = 0x13 table b. document revision history revision number substantive change(s) 0 initial release. note that this document supercedes the mpc8245rzupns. tbga xpc8240r xx250e mmmmmm atwlyywwa 8240 notes : mmmmmm is the 6-digit mask number. atwlyywwa is the traceability code. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mpc8240 part number specification for the xpc8240rxxnnnx series 7 document revision history this page intentionally left blank f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
MPC8240RXXPNS how to reach us: usa/europe/locations not listed: motorola literature distribution p.o. box 5405, denver, colorado 80217 1-480-768-2130 (800) 521-6274 japan: motorola japan ltd. sps, technical information center 3-20-1, minami-azabu minato-ku tokyo 106-8573 japan 81-3-3440-3569 asia/pacific: motorola semiconductors h.k. ltd. silicon harbour centre, 2 dai king street tai po industrial estate, tai po, n.t., hong kong 852-26668334 technical information center: (800) 521-6274 home page: www.motorola.com/semiconductors information in this document is provided solely to enable system and software implementers to use motorola products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and the stylized m logo are registered in the u.s. patent and trademark office. digital dna is a trademark of motorola, inc. the described product contains a powerpc processor core. the powerpc name is a trademark of ibm corp. and used under license. all other product or service names are the property of their re spective owners. motorola, inc. is an equal opportunity/affirmative action employer. ? motorola, inc. 2003 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
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